Spark Logic

24C02 EEPROM (24LC02B) connection guide

24C02 EEPROM (24LC02B) TDFN-8 wiring guide with power, signal assignments, and bench checks.

PDIP-8 8 contacts
SOIC-8 8 contacts
MSOP-8 8 contacts
TSSOP-8 8 contacts
DFN-8 9 contacts

TDFN-8

9 contacts Current package
SOT-23-5 5 contacts
SC-70-5 5 contacts

Microchip Technology · 2 × 3 × 0.8 mm leadless body · 0.50 mm pitch · Microchip package code /MNY

Power and bypass

Required

Connect the EEPROM and a 3.3 V I²C host to a regulated 3.3 V rail with a shared ground. Fit a 100 nF ceramic capacitor directly across the EEPROM supply pins. Finish the signal connections before applying power.

C1 100 nF ceramic between 3.3 V and Ground3.3 VC1 100 nF ceramicGround

Bench checks

  • Measure about 3.3 V from VCC to VSS at the package.
  • The underside exposed pad can be tied to VSS or left electrically floating. The numbered VSS terminal remains the supply return.

Microchip DS20001709P · §1 and §2. Microchip AN1028 · Figure 1.

Connection scenarios

Read with hardware write protection

With power off, tie WP to 3.3 V to lock the array against writes. Use a known programmed part and read it through the same I²C bus.

Fit C1 as shown in Power and bypass. Connect both open-drain host lines and start at 100 kHz.

Use 7-bit address 0x50 for a single part. The chip ignores the three low address bits and also responds to 0x51–0x57.

Send the full memory address as the next byte.

I²C wiring with separate pull-ups on SDA and SCL and WP tied high3.3 VR14.7 kΩR24.7 kΩSDASCLHostEEPROMVCCVSSWPCommon ground

Bench checks

  • For a short bus, use R1 and R2 of 4.7 kΩ each and count any host-board pull-ups in parallel. At 100 pF the estimated 30–70% rise time is 0.40 µs and LOW current is about 0.62 mA at 0.4 V. Measure SDA and SCL rise time against the 1 µs Standard-mode limit before changing speed or adding wiring.
  • Read a selected byte by sending the client address with write direction, then the memory address, then a repeated START and the client address with read direction. End a one-byte read with NACK and STOP.
  • Confirm WP is high before testing. On a scratch byte, read the original value, attempt a write, then verify the original value remains. An I²C acknowledgement alone does not verify programming.

Microchip DS20001709P · §§5–8. Microchip AN1028 · Figure 1 and pull-up calculation.

TDFN-8 wiring map

Highlighted contacts are used in the required step or selected circuit. Select a contact to inspect it.

Top view · Locate pin 1 using the package index mark.
EP is the exposed center pad on the underside.
Selected pin details

5 · SDA

Open-drain I/O · Bidirectional

Serial address and data. Pull up to the bus rail and let the host and EEPROM drive only LOW.

DS20001709P · §2 and Table 2-1

Electrical limits · Pin in the reference

Models and documents

This reference covers the standard package codes listed for Microchip 24LC02B in the linked datasheet. Match the full manufacturer part number before wiring a device marked 24C02. Use its own datasheet for other manufacturers or the Microchip AA and FC versions. Microchip 24C02C requires 4.5–5.5 V and uses A0–A2 as address inputs. Its WP input protects offsets 0x80–0xFF.

24LC02B
The /MNY package suffix selects this outline. Check the ordering table for supported temperature and reel combinations.