Spark Logic

Motorola MC6800 connection guide

Motorola MC6800 DIP-40 wiring guide with power, signal assignments, and bench checks.

DIP-40

40 contacts Current package

Motorola · P plastic (Case 711), S CERDIP (Case 734) and L ceramic (Case 715) share the top-view pin assignment.

1.0 MHz maximum. MC6800P/S/L (0–70 °C) and MC6800CP/CS/CL (−40 to +85 °C).

5 V supply and bypass

Required

Apply regulated 5 V and fit a 100 nF ceramic bypass beside the CPU. Return both ground pins directly to the ground plane or rail.

100 nF between +5 V and 0 V+5 V100 nF0 V

Bench checks

  • With power off, verify both VSS pins 1 and 21 connect to the return.
  • Measure 4.75–5.25 V at pin 8. The 100 nF capacitor is a board-level bypass choice.

Motorola MC6800 data sheet DS9471-R2, pp. 1–2

Connection scenarios

External clock, DBE and reset

Bring up the CPU with an external two-phase driver and an actively driven reset. Use a common ground and leave DMA inactive.

Bench checks

  • Scope Φ1 and Φ2 at pins 3 and 37. At 1 MHz the base grade specifies at least 400 ns HIGH on each phase and at least 900 ns total HIGH per cycle. Verify both input thresholds and the non-overlap interval.
  • Hold RESET low for at least eight clock cycles after VCC reaches 4.75 V. Keep write-sensitive peripherals disabled during the indeterminate VMA interval.
  • Confirm the boot memory supplies the high byte of the entry address at 0xFFFE and the low byte at 0xFFFF.

Motorola MC6800 data sheet DS9471-R2, Figs. 1 and 8, DBE signal description

DIP-40 wiring map

Highlighted contacts are used in the required step or selected circuit. Select a contact to inspect it.

Top view · Pin 1 at upper left · Schematic outline
Selected pin details

28 · D5

Bidirectional · Bidirectional

Data bit 5. External memory drives during reads, and the CPU can drive during writes while DBE is high.

Motorola MC6800 data sheet DS9471-R2, pin assignment and signal descriptions

Electrical limits · Pin in the reference

Models and documents

Covers MC6800, MC68A00 and MC68B00 as documented in DS9471-R2. The MC6802 and MC6808 use different pin assignments. The term “6800 interface” on a display refers to its host bus protocol and has a module-specific pinout.

MC6800
1.0 MHz maximum. MC6800P/S/L (0–70 °C) and MC6800CP/CS/CL (−40 to +85 °C).
MC68A00
1.5 MHz maximum. MC68A00P/S/L (0–70 °C) and MC68A00CP/CS/CL (−40 to +85 °C).
MC68B00
2.0 MHz maximum. MC68B00P/S/L (0–70 °C) in DS9471-R2.