Spark Logic

74HC4051 connection guide

Wire a single-supply bench circuit and trace the active signal path on the TI CD74HC4051.

Connect and bypass the supply

With power off, wire regulated +4.5 V to 16 VCC. Connect 7 VEE and 8 GND to the supply return. Fit one 100 nF ceramic capacitor across pins 16 and 8, close to the IC. Share this ground with the signal source, controls and meter.

Single supply: 4.5 V at pin 16, pins 7 and 8 to return, 100 nF across pins 16 and 8+4.5 VReturn100 nF16 VCC8 GND7 VEE

After completing the wiring below, measure +4.5 V at pin 16 and 0 V at pin 7, with meter common at pin 8. Keep every analog terminal within 0 V to 4.5 V in this circuit.

1 A4 2 A6 3 COM 4 A7 5 A5 6 E 7 VEE Used in this circuit8 GND Used in this circuit
16 VCC Used in this circuit15 A2 14 A1 13 A0 12 A3 11 S0 10 S1 9 S2
Top view · Pin 1 at upper left · Schematic outline

Choose and test a switch state

All eight switches open. The displayed address is ignored while pin 6 is HIGH.

Set the digital inputs

Wire all four controls to the indicated rail with power off. Use GND for LOW and +4.5 V for HIGH.

6 E to 4.5 V, 9 S2 to GND, 10 S1 to GND, 11 S0 to 4.5 V+4.5 V6 EGND9 S2GND10 S1+4.5 V11 S0

Connect the source and meter

2 V source at 14 A1; meter at 3 COM; all switches open; meter node biased to ground by 10 kΩ2 V DCMeter14 A13 COM10 kΩ

Apply a ground-referenced 2 V DC source at 14 A1. Read 3 COM with a high-impedance meter (10 MΩ), common at pin 8. Fit a 10 kΩ resistor from COM to GND. The external resistor pulls the reading near 0 V after settling. Without it, COM floats. With the same address and pin 6 LOW, expect near 2 V before inhibiting. At 25 °C, a 180 Ω switch in series with the 10 kΩ resistor drops about 35 mV at 2 V, assuming a low-impedance source. Leave unused analog terminals open.

1 A4 2 A6 3 COM Used in this circuit4 A7 5 A5 6 E Used in this circuit7 VEE Used in this circuit8 GND Used in this circuit
16 VCC Used in this circuit15 A2 14 A1 Used in this circuit13 A0 12 A3 11 S0 Used in this circuit10 S1 Used in this circuit9 S2 Used in this circuit
Top view · Pin 1 at upper left · Schematic outline

Electrical limits and input thresholds

Switch between two sources

Keep 1 V at 13 A0 and 2 V at 4 A7. With E LOW, address 000 connects A0 (13) to COM (3). Address 111 connects A7 (4) to COM (3). Power down to move bench straps. With GPIO control, drive E HIGH, change S2–S0, wait for the address to settle, drive E LOW, then let COM settle before sampling. This avoids passing an intermediate address during a multi-bit change.

Package and documents

TI package code N · 19.3 × 6.35 mm nominal body · 2.54 mm lead pitch. Use the outline drawing for footprint dimensions and tolerances.

Ordering codeStatus in TI addendum, 7 Oct 2026
CD74HC4051EActive
CD74HC4051E.AActive
CD74HC4051EE4Active

See pin assignments, switch truth table, operating limits and supply bypass guidance. This reference covers the TI catalog CD74HC4051.