Spark Logic

74HC4053 connection guide

Wire a 5 V bench circuit and test both throws of each Texas Instruments CD74HC4053 switch.

Connect the power and bypass capacitor

With power off, connect a regulated +5 V supply to VCC (16). Join VEE (7) and GND (8) at the supply return. Fit one 100 nF ceramic capacitor between VCC and GND close to the chip.

+5 V to VCC (16). VEE (7) and GND (8) to 0 V. 100 nF between VCC and GND.+5 V0 V100 nFVCC 16VEE 7GND 8

Complete the signal and control wiring below before applying power. With meter common at pin 8, verify +5 V at pin 16 and 0 V at pin 7.

Choose a signal path ↓

1 B1 2 B0 3 C1 4 COM C 5 C0 6 EN 7 VEE Used in this circuit8 GND Used in this circuit
16 VCC Used in this circuit15 COM B 14 COM A 13 A1 12 A0 11 S0 10 S1 9 S2
Top view · Pin 1 at upper left · Schematic outline

Choose a switch group and signal path

Wire group A · Inhibit · EN HIGH

Disable both signal sources and turn off the IC supply before moving jumpers. Connect 1 V DC to A0 (12) and 4 V DC to A1 (13). Join both source returns and the meter common to GND (8). Place the meter’s positive probe on COM A (14). Use a high-impedance meter or a scope input of 1 MΩ or higher.

Group A open. Both signal sources stay connected to their throws. COM 14 is isolated from both.1 V4 VA0 12A1 13COM A 14Meter +Open

Set these control pins with jumpers to the rails. Leave the other groups’ analog terminals open. Turn on the IC supply before enabling the two signal sources.

1 B1 2 B0 3 C1 4 COM C 5 C0 6 EN Used in this circuit7 VEE 8 GND Used in this circuit
16 VCC 15 COM B 14 COM A Used in this circuit13 A1 Used in this circuit12 A0 Used in this circuit11 S0 Used in this circuit10 S1 Used in this circuit9 S2 Used in this circuit
Top view · Pin 1 at upper left · Schematic outline

All switch paths are open.

Verify the result at COM A

EN HIGH opens all three groups. The common is high impedance and its voltage is undefined without an external bias. The meter can still display a voltage from leakage, stored charge or its own input.

Keep every driven analog pin within 0 to +5 V in this circuit, including the unselected throw. Apply signals with the IC powered. See the electrical limits.

Package and documents

D · 9.9 × 3.9 mm nominal body · 1.27 mm lead pitch. Use TI drawing 4040047-6/M for footprint dimensions and tolerances.

Order codes in TI’s 7 October 2026 addendum:

  • Active: CD74HC4053M96, CD74HC4053M96.A.
  • Obsolete: CD74HC4053M, CD74HC4053M96G3, CD74HC4053M96G4, CD74HC4053MT.

Pin assignments: Figure and Table 4-3 (p. 5). Switching: Figure 7-3 and Table 7-3 (pp. 24–25). Supply bypass: § 8.3 (p. 27). Order codes and package drawings follow the datasheet.