Spark Logic

ATmega2560 connection guide

ATmega2560 TQFP-100 wiring guide with power, signal assignments, and bench checks.

TQFP-100

100 contacts Current package
CBGA-100 100 contacts

Microchip Technology · 100 numbered contacts. See the individual package drawings for footprint dimensions.

256 KiB flash · 8 KiB SRAM · 4 KiB EEPROM · 4.5–5.5 V · 16 MHz maximum · -40 to +85 °C

Power and reset

Required

Use a current-limited supply at a voltage permitted by the order code and system clock. Tie the listed supply pins to that rail. Fit one 100 nF ceramic capacitor close to each supply-and-ground pair. Use a 10 kΩ reset pull-up for this bench circuit.

100 nF per supply pair between Target rail and GroundTarget rail100 nF per supply pairGround
10 kΩ between Target rail and ResetTarget rail10 kΩReset

Bench checks

  • With power off, check for a short across the supply. Power on and measure voltage at every supply pin and at reset.
  • Check the clock source configured by CKSEL. If a used part expects an external clock, provide it before attempting serial programming.

AN2519 §§2–3 and 2549Q · Pin descriptions and clock source

Connection scenarios

Connect USART1 to a logic-level serial adapter

Use a UART adapter that supports the target’s I/O voltage. Cross the transmit and receive lines. Leave adapter power disconnected when using the bench supply.

USART1 TX connects to adapter RX. USART1 RX connects to adapter TX. Both share ground.UART adapterAVR targetRXPD3 · TXDTXPD2 · RXDGNDGND

Bench checks

  • Configure both sides for the same baud rate, frame length, parity and stop bits. Base the MCU baud divider on the actual clock after prescaling.
  • Send a known byte such as 0x55 from the MCU and check that it arrives unchanged. If it fails, inspect TX idle voltage and bit period before attaching the adapter TX line.

2549Q · USART1 asynchronous operation and pin assignments

TQFP-100 wiring map

Highlighted contacts are used in the required step or selected circuit. Select a contact to inspect it.

TQFP-100
Top view · Pin 1 at the upper left · Schematic outline Scroll the map to reach all contacts.
Selected pin details

45 · PD2

Bidirectional · GPIO

General-purpose digital I/O. Alternate assignments: RXD (USART1), INT2 (EXINT).

After reset · GPIO driver is high impedance during reset. Clock, debug, and alternate-function use depend on fuse and peripheral configuration.

2549Q · Pinout and peripheral signal descriptions

Electrical limits · Pin in the reference

Models and documents

Each package lists the documented order codes and variants covered by this map. Select the marked model to see its peripheral assignments and memory. Check the exact order code and datasheet revision before laying out a PCB.

ATmega2560
256 KiB flash · 8 KiB SRAM · 4 KiB EEPROM. Choose the marked order code for voltage, clock, and temperature.
ATmega2560V-8AU
256 KiB flash · 8 KiB SRAM · 4 KiB EEPROM · 1.8–5.5 V · 8 MHz maximum · -40 to +85 °C
ATmega2560V-8AUR
256 KiB flash · 8 KiB SRAM · 4 KiB EEPROM · 1.8–5.5 V · 8 MHz maximum · -40 to +85 °C
ATmega2560-16AU
256 KiB flash · 8 KiB SRAM · 4 KiB EEPROM · 4.5–5.5 V · 16 MHz maximum · -40 to +85 °C
ATmega2560-16AUR
256 KiB flash · 8 KiB SRAM · 4 KiB EEPROM · 4.5–5.5 V · 16 MHz maximum · -40 to +85 °C