Analog comparator
Review each signal assignment and the peripheral enable conditions in the data sheet. AIN1 → PB1 · AIN0 → PB0
ATtiny45 / ATtiny85 pinout
Package pin assignments for ATtiny45, ATtiny85, with peripheral signals, clock grades and a serial programming guide.
4 KiB flash · 256 B SRAM · 256 B EEPROM · 2.7–5.5 V · 20 MHz maximum · -40 to +85 °C
QFN/MLF-20 pinout
EP is the exposed center pad on the underside.
8 · GND
Supply return. Connect every ground pin.
All 21 pins
| Pin | Signal | Direction | Function |
|---|---|---|---|
| 1 | PB5 Input / I/O | Input / I/O | Active-low reset input by default. Use as GPIO only where the reset-disable fuse is supported and configured. Alternate assignments: ADC0 (ADC), PCINT5 (EXINT). |
| 2 | PB3 Bidirectional | Bidirectional | General-purpose digital I/O. Alternate assignments: PCINT3 (EXINT), OC1BINV (TC1). |
| 3 | DNC Reserved | Reserved | Leave this package contact electrically unconnected. |
| 4 | DNC Reserved | Reserved | Leave this package contact electrically unconnected. |
| 5 | PB4 Bidirectional | Bidirectional | General-purpose digital I/O. Alternate assignments: ADC2 (ADC), PCINT4 (EXINT), OC1B (TC1). |
| 6 | DNC Reserved | Reserved | Leave this package contact electrically unconnected. |
| 7 | DNC Reserved | Reserved | Leave this package contact electrically unconnected. |
| 8 | GND Return | Return | Supply return. Connect every ground pin. |
| 9 | DNC Reserved | Reserved | Leave this package contact electrically unconnected. |
| 10 | DNC Reserved | Reserved | Leave this package contact electrically unconnected. |
| 11 | PB0 Bidirectional | Bidirectional | General-purpose digital I/O. Alternate assignments: AIN0 (AC), AREF (ADC), SDA (USI), DI (USI), PCINT0 (EXINT), OC0A (TC0), OC1AINV (TC1). |
| 12 | PB1 Bidirectional | Bidirectional | General-purpose digital I/O. Alternate assignments: AIN1 (AC), DO (USI), PCINT1 (EXINT), OC0B (TC0), OC1A (TC1). |
| 13 | DNC Reserved | Reserved | Leave this package contact electrically unconnected. |
| 14 | PB2 Bidirectional | Bidirectional | General-purpose digital I/O. Alternate assignments: ADC1 (ADC), SCL (USI), USCK (USI), PCINT2 (EXINT), INT0 (EXINT), T0 (TC0). |
| 15 | VCC Supply | Supply | Digital supply. Connect every VCC pin and place a local 100 nF ceramic bypass close to each VCC-to-ground pair. |
| 16 | DNC Reserved | Reserved | Leave this package contact electrically unconnected. |
| 17 | DNC Reserved | Reserved | Leave this package contact electrically unconnected. |
| 18 | DNC Reserved | Reserved | Leave this package contact electrically unconnected. |
| 19 | DNC Reserved | Reserved | Leave this package contact electrically unconnected. |
| 20 | DNC Reserved | Reserved | Leave this package contact electrically unconnected. |
| EP | EP Ground pad | Ground pad | Solder the exposed center pad to ground as shown in the package pinout notes. Connect the numbered ground contacts too. |
Signal assignments
Analog-to-digital converter
Select the analog channel and reference in firmware. The reference choice and supply constrain the input range. ADC0 → PB5 · ADC1 → PB2 · ADC2 → PB4 · AREF → PB0
Universal Serial Interface
Firmware sets the Universal Serial Interface to two-wire or three-wire operation and handles protocol state. The programming interface has its own direction assignments. SDA → PB0 · SCL → PB2 · DI → PB0 · DO → PB1 · USCK → PB2
External interrupts
Review each signal assignment and the peripheral enable conditions in the data sheet. PCINT0 → PB0 · PCINT1 → PB1 · PCINT2 → PB2 · PCINT3 → PB3 · PCINT4 → PB4 · PCINT5 → PB5 · INT0 → PB2
Timer/Counter 0
Review each signal assignment and the peripheral enable conditions in the data sheet. T0 → PB2 · OC0B → PB1 · OC0A → PB0
Timer/Counter 1
Review each signal assignment and the peripheral enable conditions in the data sheet. OC1B → PB4 · OC1BINV → PB3 · OC1A → PB1 · OC1AINV → PB0
Electrical limits
| Parameter | Limit | Conditions and source |
|---|---|---|
| Supply and clock grade2.7–5.5 V · 20 MHz maximum | 2.7–5.5 V · 20 MHz maximum | The 20 MHz grade allows up to 10 MHz at 2.7 V and 20 MHz at 4.5 V. 2586Q · Speed grades and ordering information |
| Ambient temperature grade-40 to +85 °C | -40 to +85 °C | For this order code. Verify silicon revision and errata in the current manufacturer documentation. 2586Q · Ordering information |
| Program flash4 KiB | 4 KiB | Nonvolatile program memory. 2586Q · Memory |
| SRAM256 B | 256 B | Volatile data and stack storage. 2586Q · Memory |
| EEPROM256 B | 256 B | Nonvolatile data storage. 2586Q · Memory |
| Clock and supplyOrder-code dependent | Order-code dependent | Use the grade table and the device’s speed-versus-voltage curve. 2586Q · Electrical Characteristics |
Models and documents
Each package lists the documented order codes and variants covered by this map. Select the marked model to see its peripheral assignments and memory. Check the exact order code and datasheet revision before laying out a PCB.
- ATtiny45
- 4 KiB flash · 256 B SRAM · 256 B EEPROM. Choose the marked order code for voltage, clock, and temperature.
- ATtiny45V-10MU
- 4 KiB flash · 256 B SRAM · 256 B EEPROM · 1.8–5.5 V · 10 MHz maximum · -40 to +85 °C
- ATtiny45V-10MUR
- 4 KiB flash · 256 B SRAM · 256 B EEPROM · 1.8–5.5 V · 10 MHz maximum · -40 to +85 °C
- ATtiny45-20MU
- 4 KiB flash · 256 B SRAM · 256 B EEPROM · 2.7–5.5 V · 20 MHz maximum · -40 to +85 °C
- ATtiny45-20MUR
- 4 KiB flash · 256 B SRAM · 256 B EEPROM · 2.7–5.5 V · 20 MHz maximum · -40 to +85 °C
- ATtiny85
- 8 KiB flash · 512 B SRAM · 512 B EEPROM. Choose the marked order code for voltage, clock, and temperature.
- ATtiny85V-10MU
- 8 KiB flash · 512 B SRAM · 512 B EEPROM · 1.8–5.5 V · 10 MHz maximum · -40 to +85 °C
- ATtiny85V-10MUR
- 8 KiB flash · 512 B SRAM · 512 B EEPROM · 1.8–5.5 V · 10 MHz maximum · -40 to +85 °C
- ATtiny85-20MU
- 8 KiB flash · 512 B SRAM · 512 B EEPROM · 2.7–5.5 V · 20 MHz maximum · -40 to +85 °C
- ATtiny85-20MUR
- 8 KiB flash · 512 B SRAM · 512 B EEPROM · 2.7–5.5 V · 20 MHz maximum · -40 to +85 °C
- ATtiny45/ATtiny85 data sheet· 2586Q · Pin configuration, electrical characteristics, ordering table and serial programming.
- ATtiny_DFP Device Family Pack· Machine-readable device definition: package contacts, peripheral routes, and memory sizes.
- AVR Microcontroller Hardware Design Considerations· Power supply, reset network, and programmer connection guidance.
- ATtiny45 documentation and errata· Check current manufacturer documentation, ordering status and silicon revision applicability.
- ATtiny85 documentation and errata· Check current manufacturer documentation, ordering status and silicon revision applicability.
- AVR source register· Source identifiers, applicability, retrieval dates, and SHA-256 digests.