Spark Logic

$10 O-Scope revisited

Over the last few days I’ve been playing with Ray’s STM32STM32Микроконтроллеры и процессоры…Map magic glue code, ethernet compiles, just WARNING: library LwIP claims to run on [ stm32 ] architecture(s) and may be incompatible with your current board which runs on [STM32]…[STM32GENERIC] F429i Discovery Oscilloscope idea.

Image

Some preliminary results are available here..

https://github.com/pingumacpenguin/STM3 … ontruction

My take on the Scope Sketch is here..

https://github.com/pingumacpenguin/STM32-O-Scope

Its a fun little project and well worth building just for the entertainment value. Currently bandwidth is a little limited, but with a little extra effort it would be possible to make a fully functional 2MHz Scope for next to nothing. Ideal for probing i2c, audio and other low speed signals.

EDIT: We managed to squeeze the maximum speed out of the ADC, read further through the thread for details. The github code includes all of the enhancements made of the course of this thread.

Replies15

Tue Oct 03, 2017 6:24 am

I’m Looking at the code of O-Scope and i m trying to understand how can i add a second channel for getting samples.
like
void setADCs ()

{

int pinMapADCinA = PIN_MAP[analogInPinA].adc_channel;

int pinMapADCinB = PIN_MAP[analogInPinB].adc_channel;

adc_set_sample_rate(ADC1, ADC_SMPR_1_5); //7_5 13_5

adc_set_sample_rate(ADC2, ADC_SMPR_1_5);

// adc_reg_map *regs = dev->regs;
adc_set_reg_seqlen(ADC1, 1);
ADC1->regs->SQR3 = pinMapADCinA;
ADC1->regs->CR2 |= ADC_CR2_CONT; // | ADC_CR2_DMA; // Set continuous mode and DMA
ADC1->regs->CR1 |= ADC_CR1_FASTINT; // Interleaved mode
ADC1->regs->CR2 |= ADC_CR2_SWSTART;

adc_set_reg_seqlen(ADC2, 1);
ADC2->regs->SQR3 = pinMapADCinB;
ADC2->regs->CR2 |= ADC_CR2_CONT; // ADC 2 continuos
ADC1->regs->CR1 |= ADC_CR1_FASTINT; // Interleaved mode
ADC1->regs->CR2 |= ADC_CR2_SWSTART;
}

Wed Oct 04, 2017 8:32 pm

You can’t do two channel of you’re using interleaved mode. If you want two channel, you’ll be limited in speed to half the maximum.

Sat Oct 07, 2017 6:24 pm

I think that it might be kind of “2 separate channel interleaving”. You might get ADC2 samples on the second 16 bits of every 32bit block.
But channel 2 will not be sampled at the same time as channel 1. It will be offset by 7 ADC clocks.
If setting ADC2 to pinB works, than the what I said before should be valid.

EDIT: read http://www.st.com/content/ccc/resource/ … 258017.pdf

Sun Dec 17, 2017 10:15 pm

[ThunderOwl – Thu Mar 09, 2017 9:59 am] –
Proud me 8-) , i am featuret at tomeko.net (bottom of “v2d” page) :

http://tomeko.net/miniscope_v2d/index.php?lang=en

Made my “first” attempt at replicating your feats!
Is it a simple case of desoldering the F103 and soldering the F303? Nothing else?

How did you test you swap?

I’m asking because I’ve swapped them successfully, then opened a “blinky” example on keil uVision 5 and after some trial and error, got the programmer to detect the board by switching one of the jumpers to “1” (the one next to the reset button) and after a few seconds of no led blinking, “magic smoke” begins to appear! :o I saw the led blinking once but after switching the board off, it no longer worked and magic smoke keeps appearing if I power it up (using the ST-LINKST-LINKМодули, приборы и готовые устройства…ot add the serial usb device… suspect flashing failed…. Do I need to debrick it with st-link ? (which I don’t have lol) BennehBoy Mon Jan 23, 2017 8:11 pm NM managed to rescue it…DOA boards programmer).

Sun Sep 30, 2018 9:43 am

Sorry about my stupid question: I don’t see any anti-aliasing filter on the ADC input, is this function performed by the 1 Mohm resistor and some stray capacitance?

Sun Sep 30, 2018 7:38 pm

[Squonk42 – Sun Sep 30, 2018 9:43 am] –
Sorry about my stupid question: I don’t see any anti-aliasing filter on the ADC input, is this function performed by the 1 Mohm resistor and some stray capacitance?

Pretty much, yes. The integrity of the signal is not something we have actually analysed in any detail. It would be possible to add some input protection and filtering, however given that there are other problems with the design (the common ADC and signal ground for example), the absolute fideleity of what appears on the display is somewhat of an unknown.

Good enough for government work though ;)

Sun Sep 30, 2018 7:40 pm

[ahull – Sun Sep 30, 2018 7:38 pm] –
…
Good enough for government work though ;)

+1
…. from a previous 2x “gov. worker.”

Ray

Sun Sep 30, 2018 9:43 pm

Well, it was a stupid question :D

But all signals in the frequency band between sampling frequency and half of it will fall back at full amplitude into the low frequency band. SPI would be a good candidate.

I was just thinking of the best (laziest) way to qualify our BluePill F4BluePill F4Отладочные и вычислительные платы…ld be a good candidate. I was just thinking of the best (laziest) way to qualify our BluePill F4 board analog design (ferrite bead vs. analog LDO, 2 vs. 4-layer PCB…) and compare…$10 O-Scope revisited board analog design (ferrite bead vs. analog LDO, 2 vs. 4-layer PCB…) and compare it to the other STM32STM32Микроконтроллеры и процессоры…Map magic glue code, ethernet compiles, just WARNING: library LwIP claims to run on [ stm32 ] architecture(s) and may be incompatible with your current board which runs on [STM32]…[STM32GENERIC] F429i Discovery -based boards: “original” BluePill, Baite Mapple Mini, ST NucleoNucleoОтладочные и вычислительные платы…o have this dev board for BlueNRG at a pretty hefty price tag though, hopefully the ‘ nucleo ’ & common dev board versions would be out soon Laughing … 007v1.html oops/oh found an…Arduino on Nordic BLE nRF51822 F103.

For this, I would need to capture at the highest possible sampling rate and perform an FFT (possibly not onboard) to measure SNR, noise floor, PSRR-dc, PSRR-ac and PMSR. Starting from the Pig-O-Scope was one of my options, but I will need an anti-aliasing filter to get any meaningful result.

Mon Oct 01, 2018 8:23 am

I can tell you from my experience on Blue PillBlue PillОтладочные и вычислительные платы…as become my new favorite board. I am calling it “blue pad” and it is kind of super “ blue pill ”. Pito Thu Jul 27, 2017 8:53 pm [victor_pv – Thu Jul 27, 2017 3:58 pm] – Just for…very small STM32F405 board and Maple MiniMaple MiniОтладочные и вычислительные платы…8MHz petertumler Thu Sep 24, 2015 10:58 am Hi, I’m trying to underclock a STM32F103 ( Maple Mini ) to 48MHz (for energy efficiency reasons). According to the datasheet .. The full…Underclocking STM32F103 to 48MHz (clone): the SPI influences very strongly the ADC samples.
To be checked on black and mini F4 boards.

Mon Oct 01, 2018 1:55 pm

[Squonk42 – Sun Sep 30, 2018 9:43 pm] –
For this, I would need to capture at the highest possible sampling rate and perform an FFT (possibly not onboard) to measure SNR, noise floor, PSRR-dc, PSRR-ac and PMSR. Starting from the Pig-O-Scope was one of my options, but I will need an anti-aliasing filter to get any meaningful result.

Wouldn’t noise floor, PSRR-dc, and PSRR-ac be measured with the input grounded? For those cases there’s nothing from the input signal to alias and I would expect internally generated spurious interference, e.g. SPI, to mostly be introduced after any anti-alias filter.

For SNR you wouldn’t strictly need an anti-aliasing filter if the source tone is free from harmonics (this may be problematic) and the frequency is selected such that any distortion harmonics do not alias on top of one another. The usual concern here is spur free dynamic range.

I’m not clear on what PMSR might be.

Mon Oct 01, 2018 2:04 pm

The “cheap clones” have a 2-sided PC board, no separate analog and separate digital ground planes. The original MapleMapleОтладочные и вычислительные платы…expensive short of buying in bulk. many resort to usb-serial converters. today comes leaflabs maple , stm32duino it is ‘disruptive’ in a similar light, user customizable usb is no…Linux Journal design was a 4-layered board. The noise floor for analog signals is now influenced by the internal dynamics of the digital logic as well as external PC board capacitive and inductive coupling.

Ray

Mon Oct 01, 2018 2:18 pm

[MarkB – Mon Oct 01, 2018 1:55 pm] –
[Squonk42 – Sun Sep 30, 2018 9:43 pm] –
For this, I would need to capture at the highest possible sampling rate and perform an FFT (possibly not onboard) to measure SNR, noise floor, PSRR-dc, PSRR-ac and PMSR. Starting from the Pig-O-Scope was one of my options, but I will need an anti-aliasing filter to get any meaningful result.

Wouldn’t noise floor, PSRR-dc, and PSRR-ac be measured with the input grounded? For those cases there’s nothing from the input signal to alias and I would expect internally generated spurious interference, e.g. SPI, to mostly be introduced after any anti-alias filter.

For SNR you wouldn’t strictly need an anti-aliasing filter if the source tone is free from harmonics (this may be problematic) and the frequency is selected such that any distortion harmonics do not alias on top of one another. The usual concern here is spur free dynamic range.

I’m not clear on what PMSR might be.

Yes, you are right for PSRR-dc and PSRR-ac, but for testing PSMR (Power Supply Modulation Ratio, sorry for the typo), you need to drive the ADC input and add perturbation to the power supply at the same time, see http://www.analog.com/en/technical-arti … d-adc.html.

For the SNR, my plan was to use a pure sine wave at half the sampling frequency) as the worst case and to test both with/without SPI.

Mon Oct 01, 2018 2:34 pm

[mrburnette – Mon Oct 01, 2018 2:04 pm] –
The “cheap clones” have a 2-sided PC board, no separate analog and separate digital ground planes. The original MapleMapleОтладочные и вычислительные платы…expensive short of buying in bulk. many resort to usb-serial converters. today comes leaflabs maple , stm32duino it is ‘disruptive’ in a similar light, user customizable usb is no…Linux Journal design was a 4-layered board. The noise floor for analog signals is now influenced by the internal dynamics of the digital logic as well as external PC board capacitive and inductive coupling.

Ray

Unfortunately, I don’t have an original MapleMapleОтладочные и вычислительные платы…expensive short of buying in bulk. many resort to usb-serial converters. today comes leaflabs maple , stm32duino it is ‘disruptive’ in a similar light, user customizable usb is no…Linux Journal board, only a Baite clone which is indeed different. I accept donations for science :)

However, the problem is not necessarily 2-layer vs. 4-layer or separate ground planes, but ground return path and common power supply for analog/digital combined with poor STM32STM32Микроконтроллеры и процессоры…Map magic glue code, ethernet compiles, just WARNING: library LwIP claims to run on [ stm32 ] architecture(s) and may be incompatible with your current board which runs on [STM32]…[STM32GENERIC] F429i Discovery ADC PSRR performance (I have seen figures as low as 20 dB, but can’t get my hands on it right now).

Of course, we could go 4-layer with separate analog LDO just to be safe, but 1) this will add $1 to the bill for a <$10 board, 2) I have seen many other MCUs working fine with only 2-layer and no separate LDO, and 3) even ST is recommending only a ferrite bead and implemented it as such on their NucleoNucleoОтладочные и вычислительные платы…o have this dev board for BlueNRG at a pretty hefty price tag though, hopefully the ‘ nucleo ’ & common dev board versions would be out soon Laughing … 007v1.html oops/oh found an…Arduino on Nordic BLE nRF51822 F103 board with only 2-layer PCB.

This is why we want to verify what is really making a difference here.

Mon Oct 01, 2018 3:05 pm

[Squonk42 – Mon Oct 01, 2018 2:18 pm] –
For the SNR, my plan was to use a pure sine wave at half the sampling frequency) as the worst case and to test both with/without SPI.

Right, what I was suggesting is using something slightly less than half the sampling frequency so distortion harmonics don’t land on top of each other after the FFT.

For example with 0.45*Fs, the second harmonic would show up at 0.9*Fs (aliased to 0.1*Fs), the third harmonic at 1.35*Fs (aliased to 0.35*Fs), and so forth.

Mon Oct 01, 2018 3:10 pm

[MarkB – Mon Oct 01, 2018 3:05 pm] –
[Squonk42 – Mon Oct 01, 2018 2:18 pm] –
For the SNR, my plan was to use a pure sine wave at half the sampling frequency) as the worst case and to test both with/without SPI.

Right, what I was suggesting is using something slightly less than half the sampling frequency so distortion harmonics don’t land on top of each other after the FFT.

For example with 0.45*Fs, the second harmonic would show up at 0.9*Fs (aliased to 0.1*Fs), the third harmonic at 1.35*Fs (aliased to 0.35*Fs), and so forth.

Yes, very good idea, thank you!

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