SPARK LOGIC / MICROCONTROLLER REFERENCE
STM32F103.
Explore the pinout, specifications, and package options.
01 / PACKAGE AND SIGNALS
Pinout
SELECTED PIN
#1VBAT
- After reset
- VBAT
- Alternate functions
- —
- AFIO remapping
- —
PowerReset and bootDebugClockOther
Pin table
64 / 64| No. | Pin | After reset | Alternate functions | Remapping |
|---|---|---|---|---|
| 1 | VBAT | — | — | |
| 2 | PC13 | TAMPER-RTC | — | |
| 3 | PC14 | OSC32_IN | — | |
| 4 | PC15 | OSC32_OUT | — | |
| 5 | OSC_IN | — | PD0 | |
| 6 | OSC_OUT | — | PD1 | |
| 7 | NRST | — | — | |
| 8 | PC0 | ADC12_IN10 | — | |
| 9 | PC1 | ADC12_IN11 | — | |
| 10 | PC2 | ADC12_IN12 | — | |
| 11 | PC3 | ADC12_IN13 | — | |
| 12 | VSSA | — | — | |
| 13 | VDDA | — | — | |
| 14 | PA0 | WKUP · USART2_CTS · ADC12_IN0 · TIM2_CH1_ETR | — | |
| 15 | PA1 | USART2_RTS · ADC12_IN1 · TIM2_CH2 | — | |
| 16 | PA2 | USART2_TX · ADC12_IN2 · TIM2_CH3 | — | |
| 17 | PA3 | USART2_RX · ADC12_IN3 · TIM2_CH4 | — | |
| 18 | VSS_4 | — | — | |
| 19 | VDD_4 | — | — | |
| 20 | PA4 | SPI1_NSS · USART2_CK · ADC12_IN4 | — | |
| 21 | PA5 | SPI1_SCK · ADC12_IN5 | — | |
| 22 | PA6 | SPI1_MISO · ADC12_IN6 · TIM3_CH1 | TIM1_BKIN | |
| 23 | PA7 | SPI1_MOSI · ADC12_IN7 · TIM3_CH2 | TIM1_CH1N | |
| 24 | PC4 | ADC12_IN14 | — | |
| 25 | PC5 | ADC12_IN15 | — | |
| 26 | PB0 | ADC12_IN8 · TIM3_CH3 | TIM1_CH2N | |
| 27 | PB1 | ADC12_IN9 · TIM3_CH4 | TIM1_CH3N | |
| 28 | PB2 / BOOT1 | — | — | |
| 29 | PB10 | I2C2_SCL · USART3_TX | TIM2_CH3 | |
| 30 | PB11 | I2C2_SDA · USART3_RX | TIM2_CH4 | |
| 31 | VSS_1 | — | — | |
| 32 | VDD_1 | — | — | |
| 33 | PB12 | SPI2_NSS · I2C2_SMBA · USART3_CK · TIM1_BKIN | — | |
| 34 | PB13 | SPI2_SCK · USART3_CTS · TIM1_CH1N | — | |
| 35 | PB14 | SPI2_MISO · USART3_RTS · TIM1_CH2N | — | |
| 36 | PB15 | SPI2_MOSI · TIM1_CH3N | — | |
| 37 | PC6 | — | TIM3_CH1 | |
| 38 | PC7 | — | TIM3_CH2 | |
| 39 | PC8 | — | TIM3_CH3 | |
| 40 | PC9 | — | TIM3_CH4 | |
| 41 | PA8 | USART1_CK · TIM1_CH1 · MCO | — | |
| 42 | PA9 | USART1_TX · TIM1_CH2 | — | |
| 43 | PA10 | USART1_RX · TIM1_CH3 | — | |
| 44 | PA11 | USART1_CTS · CAN_RX · USB_DM · TIM1_CH4 | — | |
| 45 | PA12 | USART1_RTS · CAN_TX · USB_DP · TIM1_ETR | — | |
| 46 | JTMS / SWDIO | — | — | |
| 47 | VSS_2 | — | — | |
| 48 | VDD_2 | — | — | |
| 49 | JTCK / SWCLK | — | — | |
| 50 | JTDI | — | TIM2_CH1_ETR · SPI1_NSS | |
| 51 | PC10 | — | USART3_TX | |
| 52 | PC11 | — | USART3_RX | |
| 53 | PC12 | — | USART3_CK | |
| 54 | PD2 | TIM3_ETR | — | |
| 55 | JTDO / TRACESWO | — | TIM2_CH2 · SPI1_SCK | |
| 56 | JNTRST | — | TIM3_CH1 · SPI1_MISO | |
| 57 | PB5 | I2C1_SMBA | TIM3_CH2 · SPI1_MOSI | |
| 58 | PB6 | I2C1_SCL · TIM4_CH1 | USART1_TX | |
| 59 | PB7 | I2C1_SDA · TIM4_CH2 | USART1_RX | |
| 60 | BOOT0 | — | — | |
| 61 | PB8 | TIM4_CH3 | I2C1_SCL · CAN_RX | |
| 62 | PB9 | TIM4_CH4 | I2C1_SDA · CAN_TX | |
| 63 | VSS_3 | — | — | |
| 64 | VDD_3 | — | — |
02 / SPECIFICATIONS
Compare variants
Cortex-M3Arm core
72 MHzMaximum core frequency
20 KBSRAM on both variants
2.0–3.6 VVDD operating voltage
The family supports USB Full Speed, CAN 2.0B, up to three USARTs, two SPI interfaces, and two I²C interfaces. See the pinout for signals available on each package.
03 / DOCUMENTATION
Documentation and discussions
- ST DS5319 Rev 20 ↗ · package diagrams, Table 5, and electrical characteristics
- ST RM0008 ↗ · GPIO and AFIO chapter
- Custom STM32F103C8T6 board · Spark Logic
- STM32F103C8T6 power consumption · Spark Logic