Spark Logic

74HC14 hex Schmitt-trigger inverter

Six independent inverters with Schmitt-trigger inputs and push-pull outputs.

Pinout

Top view · Pin 1 at upper left · Schematic outline
Arrows show signal direction between paired pins.
Go to selected pin details ↓

12 · 6Y

Push-pull output · 0 V to VCC

Connect to a compatible logic input. Leave it open when unused. Avoid tying push-pull outputs together.

Electrical limits

All 14 pins

PinNameRoleRange
11ASchmitt-trigger input0 V to VCC
21YPush-pull output0 V to VCC
32ASchmitt-trigger input0 V to VCC
42YPush-pull output0 V to VCC
53ASchmitt-trigger input0 V to VCC
63YPush-pull output0 V to VCC
7GNDGround reference0 V
84YPush-pull output0 V to VCC
94ASchmitt-trigger input0 V to VCC
105YPush-pull output0 V to VCC
115ASchmitt-trigger input0 V to VCC
126YPush-pull output0 V to VCC
136ASchmitt-trigger input0 V to VCC
14VCCPositive supply2–6 V

Inverter channels

Each channel has a fixed input and output. Below the falling threshold A reads LOW and Y is HIGH. Above the rising threshold A reads HIGH and Y is LOW. Between the two thresholds of a given gate, Y retains its previous state while powered.

Electrical limits

Recommended operation for TI SN74HC14 is VCC 2–6 V, free-air temperature −40 to +85 °C, and input and output voltages within the supply rails. All voltages are relative to GND.

Schmitt thresholds and hysteresis

Entries are min / typ / max in volts. Limits cover −40 to +85 °C. Typical values are at 25 °C.

VCCRising Vₜ₊Falling Vₜ₋Hysteresis ΔVₜ
2 V0.7 / 1.2 / 1.5 0.3 / 0.6 / 1 0.2 / 0.6 / 1.2
4.5 V1.55 / 2.5 / 3.13 0.9 / 1.6 / 2.45 0.4 / 0.9 / 2.1
6 V2.1 / 3.3 / 4.2 1.2 / 2 / 3.2 0.5 / 1.3 / 2.5

To guarantee switching across parts, drive above the rising maximum for HIGH and below the falling minimum for LOW. At 4.5 V, those boundaries are 3.13 V and 0.90 V respectively. The two threshold ranges describe variation across parts. Use the specified ΔVₜ for the threshold separation of one gate.

TI specifies no input transition-rate limit for this device. Slow edges can increase supply current. Check logic levels at the actual supply voltage. TI tabulates threshold limits at 2 V, 4.5 V and 6 V. The input clamp diodes make power sequencing and rail compatibility important when connecting another voltage domain.

Output levels at 4.5 V

Output load magnitudeVOL maxVOH min
20 µA≤ 0.1 V ≥ 4.4 V
4 mA0.33 V 3.84 V

Limits apply over −40 to +85 °C with a valid LOW or HIGH input. At 4.5 V and 50 pF, propagation delay is 12 ns typical at 25 °C and 31 ns maximum across the operating temperature range.

TI SCLS085L §§ 5.3, 5.5 and 5.7 specify operating and switching limits. The absolute maximum current ratings in § 5.1 are stress limits.

Package and documents

TI package code N · 19.3 × 6.35 mm nominal body · 2.54 mm lead pitch. Use TI’s package outline for footprint dimensions and tolerances.

TI lists these active order codes in its 18 September 2026 addendum. SN74HC14N, SN74HC14N.A, SN74HC14NE4.

TI SCLS085L § 4 shows the top-view pin assignments. § 11 includes the package option addendum and outline drawings.