USB data pair
Keep the D+ and D− polarity consistent at the connector and the bridge. Use the package-specific application circuit for matching and bypass components.
The CH340G bridges USB Full Speed to an asynchronous logic-level UART. Its XI and XO leads need a 12 MHz crystal circuit.
Main supply input. Connect to the specified operating rail and decouple locally.
| Pin | Signal | Direction | Function |
|---|---|---|---|
| 1 | GND Return | Return | Connect to the circuit ground plane. |
| 2 | TXD Output | Output | Asynchronous transmit. Connect to the receiver of the external logic-level UART. |
| 3 | RXD Input | Input | Asynchronous receive. Connect to the transmitter of the external logic-level UART. |
| 4 | V3 Regulator terminal | Regulator terminal | At 5 V VCC, bypass this node to ground with 100 nF. With a regulated 3.3 V supply, connect V3 and VCC together. |
| 5 | UD+ Bidirectional | Bidirectional | USB D+ line. Route with the other data line as a differential pair and use the manufacturer’s reference circuit. |
| 6 | UD− Bidirectional | Bidirectional | USB D− line. Route with the other data line as a differential pair and use the manufacturer’s reference circuit. |
| 7 | XI Input | Input | Input of the 12 MHz crystal oscillator. Keep the crystal network close to the part. |
| 8 | XO Output | Output | Output of the 12 MHz crystal oscillator. |
| 9 | CTS# Input | Input | Clear to Send, active low. |
| 10 | DSR# Input | Input | Data Set Ready, active low. |
| 11 | RI# Input | Input | Ring Indicator, active low. |
| 12 | DCD# Input | Input | Data Carrier Detect, active low. |
| 13 | DTR# Output | Output | Data Terminal Ready, active low. |
| 14 | RTS# Output | Output | Request to Send, active low. |
| 15 | R232 Input | Input | Optional receive-polarity control. Leave open for the normal UART circuit. |
| 16 | VCC Supply input | Supply input | Main supply input. Connect to the specified operating rail and decouple locally. |
Keep the D+ and D− polarity consistent at the connector and the bridge. Use the package-specific application circuit for matching and bypass components.
Use the receive and transmit pair with a common ground. The signals use logic-level voltages. A separate transceiver is needed for bipolar RS-232.
| Parameter | Limit | Conditions and source |
|---|---|---|
| 5 V supply mode5 V nominal | 5 V nominal | VCC takes the supply. Bypass V3 to ground with 100 nF. WCH CH340DS1, version 3B, §5.1 |
| 3.3 V supply mode3.3 V nominal | 3.3 V nominal | Tie V3 to VCC and keep the connected circuits at or below 3.3 V. WCH CH340DS1, version 3B, §5.1 |
| External oscillator12 MHz | 12 MHz | The example uses 33 pF load capacitors. Select the actual values to suit the crystal and PCB parasitics. WCH CH340DS1, version 3B, §7.2 |
| UART data rate50 bit/s to 2 Mbit/s | 50 bit/s to 2 Mbit/s | Use a rate supported by the driver and both ends of the UART. WCH CH340DS1, version 3B, §2 |
The interactive map covers the CH340G SOP-16. See CH340DS1 §3 for CH340C, CH340B and the smaller CH340 packages. Some variants use an internal clock and assign pins 7 and 8 differently.