CP2102 USB-to-UART bridge pinout

The original CP2102 is a USB Full Speed UART bridge with an integrated USB transceiver and 3.3 V regulator.

QFN-28

29 contacts Current package

Silicon Labs · 5 × 5 mm · 0.50 mm pitch · grounded exposed pad

QFN-28 pinout

QFN-28

Top view. Match pin 1 to the package mark. The numbers advance counterclockwise. Scroll the map to reach all contacts.

Selected pin details

12 · SUSPEND

Output · Outputs

High when the USB bridge is suspended.

Silicon Labs CP2102/9 datasheet, Rev. 1.8, Table 9 and Fig. 2

Electrical limits · Link to this pin

All 29 pins

Pin	Signal	Direction	Function
1	DCD# Input	Input	Data Carrier Detect, active low.
2	RI# Input	Input	Ring Indicator, active low.
3	GND Return	Return	Connect to the circuit ground plane.
4	D+ Bidirectional	Bidirectional	USB D+ line. Route with the other data line as a differential pair and use the manufacturer’s reference circuit.
5	D− Bidirectional	Bidirectional	USB D− line. Route with the other data line as a differential pair and use the manufacturer’s reference circuit.
6	VDD Supply or regulator output	Supply or regulator output	3.0–3.6 V supply pin. In the bus-powered configuration it is the internal regulator output.
7	REGIN Supply input	Supply input	Input to the on-chip 5 V to 3.3 V regulator. Connect to USB VBUS in the bus-powered configuration.
8	VBUS Input	Input	USB VBUS sense input. Connect to the connector VBUS in the bus-powered configuration.
9	RST Open-drain bidirectional	Open-drain bidirectional	The internal reset circuit can pull this node low. An external source can reset the chip by holding it low for at least 15 µs.
10	NC Unconnected	Unconnected	Leave open for this circuit.
11	SUSPEND# Output	Output	Low when the USB bridge is suspended.
12	SUSPEND Output	Output	High when the USB bridge is suspended.
13	NC Unconnected	Unconnected	Leave open for this circuit.
14	NC Unconnected	Unconnected	Leave open for this circuit.
15	NC Unconnected	Unconnected	Leave open for this circuit.
16	NC Unconnected	Unconnected	Leave open for this circuit.
17	NC Unconnected	Unconnected	Leave open for this circuit.
18	NC Unconnected	Unconnected	Leave open for this circuit.
19	NC Unconnected	Unconnected	Leave open for this circuit.
20	NC Unconnected	Unconnected	Leave open for this circuit.
21	NC Unconnected	Unconnected	Leave open for this circuit.
22	NC Unconnected	Unconnected	Leave open for this circuit.
23	CTS# Input	Input	Clear to Send, active low.
24	RTS# Output	Output	Request to Send, active low.
25	RXD Input	Input	Asynchronous receive. Connect to the transmitter of the external logic-level UART.
26	TXD Output	Output	Asynchronous transmit. Connect to the receiver of the external logic-level UART.
27	DSR# Input	Input	Data Set Ready, active low.
28	DTR# Output	Output	Data Terminal Ready, active low.
EP	EP Return	Return	Exposed underside paddle. Solder to the PCB ground pad.

Signal assignments

USB data pair

Keep the D+ and D− polarity consistent at the connector and the bridge. Use the package-specific application circuit for matching and bypass components.

Asynchronous UART

Use the receive and transmit pair with a common ground. The signals use logic-level voltages. A separate transceiver is needed for bipolar RS-232.

Electrical limits

Parameter	Limit	Conditions and source
VDD3.0–3.6 V	3.0–3.6 V	Range for supply and UART electrical specifications. Silicon Labs CP2102/9 datasheet, Rev. 1.8, Tables 3–4
UART maximum921,600 bit/s	921,600 bit/s	Maximum rate in the UART electrical table. Select supported rates in the driver. Silicon Labs CP2102/9 datasheet, Rev. 1.8, Table 4

Models and documents

This map covers the original CP2102 in QFN-28. The CP2102N uses a different datasheet and package map. Pin 18 is reserved on the CP2102 and is VPP on CP2109.

CP2102-GM: 5 × 5 mm · 0.50 mm pitch · grounded exposed pad

Silicon Labs CP2102/9 datasheet· Table 9, QFN-28 pinout and USB power configurations.
Silicon Labs CP2102 product documentation· Design resources and drivers for the original CP2102.