Display SPI
The host sends the clock and display data. The separate D/C line distinguishes command or register index from data.
The ILI9342 family drives landscape 320 × 240 displays. The M5Stack Core2 v1.0 uses an ILI9342C display over SPI and an AXP192 for the display supply, backlight and reset.
Data or command selection from ESP32 GPIO15.
| Pin | Signal | Direction | Function |
|---|---|---|---|
| 1 | GND Supply return | Supply return | Connect to host ground. |
| 2 | MOSI Input | Input | SPI data from ESP32 GPIO23. |
| 3 | MISO Output | Output | SPI read data to ESP32 GPIO38. |
| 4 | SCK Input | Input | SPI clock from ESP32 GPIO18. |
| 5 | CS Input | Input | Active-low select from ESP32 GPIO5. |
| 6 | RST Input | Input | Reset driven by AXP192 IO4. |
| 7 | D/C Input | Input | Data or command selection from ESP32 GPIO15. |
| 8 | VDD Supply input | Supply input | Panel power on PERI_VDD from the PMIC. |
| 9 | LED_A Supply input | Supply input | Backlight anode on LCD_BL from the PMIC. |
| 10 | GND Supply return | Supply return | Connect to host ground. |
| Parameter | Limit | Conditions and source |
|---|---|---|
| Panel pixels320 × 240 | 320 × 240 | The factory Core2 panel runs in landscape orientation. M5Stack Core2 v1.0 LCD1 schematic and Core2 hardware PinMap. |
| Display I/OOnboard ESP32 SPI | Onboard ESP32 SPI | LCD1 is an internal connection on the Core2 v1.0 board. M5Stack Core2 v1.0 LCD1 schematic and Core2 hardware PinMap. |
| PMICAXP192 | AXP192 | Board firmware sets up panel power, reset and backlight. M5Stack Core2 v1.0 LCD1 schematic and Core2 hardware PinMap. |
The map covers the original Core2 v1.0 LCD1 connection in the M5Stack schematic. Its ESP32 and AXP192 assignments are specific to that board revision.